1. Field of the Invention
The present invention relates to the design of power supply circuits for electrical and electronic equipment. More specifically, the present invention pertains to the reduction of power consumption in a display device in standby mode.
2. Related Art
With the increasingly widespread use of display devices in businesses, education and the typical household, such as those used in computer systems, much effort is constantly expended in an attempt to reduce the power consumption of display devices so as to conserve energy. Many display devices today provide a mechanism by which the appliance enters a xe2x80x9cstandby modexe2x80x9d after a period of inactivity. While in the standby mode, the device consumes less power than it does while in active use, commonly referred to in the art as being in its xe2x80x9cmain modexe2x80x9d under normal operating conditions. When activity resumes, the device exits its standby mode and reenters its main mode, wherein power consumption returns to the normal operating level. As such, power is conserved in standby mode wherein the device remains xe2x80x9conxe2x80x9d even though it is not currently being used, and the requisite power level for main mode operation is promptly restored upon the resumption of active use.
Nevertheless, a recent European regulation has stipulated that power consumption of display devices in standby mode is to be less than one watt instead of three watts. This and other similar regulatory changes and the need to conserve power call for the industry to develop new circuits for implementing standby mode in display devices that can meet new power consumption requirements.
To implement power mode switching between main mode and standby mode in a display device as described above, several prior art circuits have been developed to use the synchronization (sync) signal(s), e.g., horizontal sync (h-sync) signal, vertical sync (v-sync) signal, sent from a computer to a display device (e.g., CRT monitor) and lack thereof as a trigger to switch between main mode and standby mode. In the display device art, it is known that with respect to the two sync signals, either separately or as a composite sync signal, when both the h-sync (horizontal) and v-sync (vertical) signals are present, the display device should be in main mode; that when only the v-sync signal is present, the display device should be in suspend mode; and that when only the h-sync signal is present, the display device should be in standby mode. Thus, a sync detect circuit can be used in conjunction with a microprocessor to monitor the sync signal(s) and control the voltage supplied to the monitor accordingly, thereby controlling the power it consumes.
Prior Art FIG. 1 illustrates one prior art circuit 100 wherein two power supplies are used to implement switching between main mode and standby mode. More particularly, prior art circuit 100 has an alternating current (AC) power input 101 and two separate power supplies 110 and 120, wherein AC input 101 is coupled to a main power supply 110 and a standby power supply 120 in parallel. Additionally, a microprocessor 130 is coupled between main power supply 110 and standby power supply 120. Further, a sync detect circuit 140 is coupled between standby power supply 120 and microprocessor 130. Sync detect circuit 140 is also coupled to a computer 199. In this prior art circuit 100, when the display device is operating in main mode, main power supply 110 provides power to the display CRT and other circuit elements (e.g., microprocessor 130 and sync detect circuit 140) via outputs 111, 112, 113 and 114. Typical values for these outputs of main power supply 110 are: +200 volts for output 111, +80 volts for output 112, +16 volts for output 113, and xe2x88x9216 volts for output 114. With these exemplary values, outputs 111 and 112 are typically coupled to the display CRT, and outputs 113 and 114 are typically coupled to the horizontal and vertical differentials (h-diff and v-diff) of the display device. In the same circuit 100, when the display device is in standby mode and the display CRT is inactive, standby power supply 120 provides power to microprocessor 130 via output 123 (e.g., 5 volts or 3.3 volts) and to sync detect circuit 140 via output 124 (e.g., 5 volts or 3.3 volts).
Still referring to Prior Art FIG. 1, sync detect circuit 140 serves as a buffer between computer 199 and microprocessor 130. When sync detect circuit 140 no longer detects a sync signal 194 from computer 199, sync detect circuit 140 sends a xe2x80x9cno_syncxe2x80x9d signal 143 to microprocessor 130, which in turn sends an xe2x80x9coffxe2x80x9d signal 131 to main power supply 110. In response to off signal 131, main power supply 110 is turned off and the display device enters standby mode. Note that standby power supply 120 remains on while the display device is in standby mode to power microprocessor 130 and sync detect circuit 140. In other words, standby power supply 120 is always xe2x80x9conxe2x80x9d irrespective of whether the display device is in main mode or standby mode. As such, sync detect circuit 140 continues to monitor for sync signal 194 from computer 199 while the display device is in standby mode. Upon detecting the resumption of signal 194 from computer 199, sync detect circuit 140 sends a xe2x80x9csyncxe2x80x9d signal 143 to microprocessor 130, which in turn sends an xe2x80x9conxe2x80x9d signal 131 to main power supply 110. In response, main power supply 110 is turned on again and the display device thus resumes its main mode of operation.
One major disadvantage of prior art circuit 100 of FIG. 1 is that standby power supply 120 remains on even when the display device is in standby mode. The constant presence of an active power supply in circuit 100 means that power loss due to switching action of the power supply (switching loss) cannot be avoided. Consequently, it is difficult to achieve a low power consumption level using prior art circuit 100. For example, with AC input 101 at approximately 230 volts, as it is typically the case for European appliances, and with the exemplary values described above with respect to outputs 123 and 124 (5 volts or 3.3 volts), prior art circuit 100 cannot consistently achieve a standby power consumption of 1 W or less, as is required by the new European standard. Furthermore, prior art circuit 100 is also expensive to implement because an extra power supply, namely, standby power supply 120, is always required in addition to main power supply 110. As such, a circuit for power mode switching in a display device which consistently achieves less than 1 W power dissipation in standby mode and which is inexpensive to build is needed.
FIG. 2 illustrates another prior art circuit 200 wherein a single power supply is used to implement switching between main mode and standby mode. More specifically, prior art circuit 200 has an AC power input 201 and a power supply 210, wherein AC input 201 is coupled to power supply 210 having four outputs 211, 212, 213 and 214. Typical values for these outputs of power supply 210 while the display device is in main mode are: +200 volts for output 211, +80 volts for output 212, +16 volts for output 213, and xe2x88x9216 volts for output 214. Moreover, outputs 211 and 212 are typically coupled to the display CRT, and outputs 213 and 214 are typically coupled to the horizontal and vertical differentials (h-diff and v-diff) of the display device. Also, output 211 is coupled to a voltage drop circuit 250, and output 213 is coupled to a voltage regulator 260. Voltage regulator 260 is coupled to a microprocessor 230 via line 263, and to a sync detect circuit 240 via line 264. Thus, voltage regulator 260 is coupled between power supply 210 and microprocessor 230, as well as between power supply 210 and sync detect circuit 240. Sync detect circuit 240 is further coupled to microprocessor 230 and to a computer 299. Furthermore, microprocessor 230 is coupled to voltage drop circuit 250, which is in turn coupled to voltage regulator 260.
Referring to both Prior Art FIGS. 1 and 2, it is noted that prior art circuit 200 differs from prior art circuit 100 in that a single power supply, namely, power supply 210, provides power to the display CRT and other circuit elements (e.g., microprocessor 230 and sync detect circuit 240) irrespective of whether the display device is operating in main mode or standby mode. In other words, there is no separate power supply for powering the microprocessor 230 and sync detect circuit 240, as is the case in prior art circuit 100 with respect to microprocessor 130 and sync detect circuit 140. In particular, in prior art circuit 200, power is provided to microprocessor 230 and sync detect circuit 240 through voltage regulator 260.
Referring still to Prior Art FIG. 2, sync detect circuit 240 serves as a buffer between computer 299 and microprocessor 230. While the display device is operating in main mode, voltage drop circuit 250 is off and voltage regulator 260 is powered by output 213 of power supply 210 at about +16 volts. When sync detect circuit 240 ceases to detect a sync signal 294 from computer 299, sync detect circuit 240 sends a xe2x80x9cno_syncxe2x80x9d signal 243 to microprocessor 230, which in turn sends an xe2x80x9conxe2x80x9d signal 235 to voltage drop circuit 250. In response, voltage drop circuit 250 is turned on. As a result, the voltage at output 211 of power supply 210 drops from about +200 volts to about +12 volts, whereas the voltage at output 213 of power supply 210 drops from about +16 volts to substantially 0 volt. At this time, the display device enters standby mode, wherein power supply 220 remains on but delivers reduced outputs due to the action of voltage drop circuit 250. In standby mode, voltage regulator 260 no longer derives power via output 213 but instead via voltage drop circuit 250 over line 256. As such, voltage regulator 260 continues to furnish power to microprocessor 230 and to sync detect circuit 249, which continues to monitor for sync signal 294 from computer 299 while the display device is in standby mode. Upon detecting the resumption of signal 294 from computer 299, sync detect circuit 240 sends a xe2x80x9csyncxe2x80x9d signal 243 to microprocessor 230, which in turn sends an xe2x80x9coffxe2x80x9d signal 235 to voltage drop circuit 250. In response, voltage drop circuit 250 is turned off again and the display device thus resumes its main mode of operation.
Like prior art circuit 100, one major disadvantage of prior art circuit 200 of FIG. 2 is that the constant presence of an active power supply in circuit 200, namely, power supply 210, means that power loss due to switching action of the power supply (switching loss) cannot be avoided. Consequently, it is difficult to achieve a low power consumption level using, prior art circuit 200. For instance, with AC input 201 at approximately 230 volts, as it is typically the case for European appliances, and with the exemplary voltage of +12 volts delivered at output 211, prior art circuit 200 cannot consistently achieve a standby power consumption of 1 W or less, as is required by the new European standard. Furthermore, prior art circuit 200 is still relatively expensive to build because voltage drop circuit 250 and voltage regulator 260 are required for its implementation. As such, a circuit for power mode switching in a display device which consistently achieves less than 1 W power dissipation in standby mode and which is inexpensive to build is needed.
Additionally, in implementing a viable circuit for power mode switching in a display device, it is highly desirable that components that are well known in the art and are compatible with existing computer systems and/or display devices be used so that the cost of realizing the circuit for power mode switching is low. By so doing, the need to incur costly expenditures for retrofitting existing computer systems and/or display devices or for building custom components is advantageously eliminated.
Thus, a need exists for a system and method for power mode switching in a display device which consistently achieves less than 1 W power dissipation in standby mode. A further need exists for a system and method for power mode switching in a display device which meets the above listed need and which is inexpensive to build. Still another need exists for a system and method for power mode switching in a display device which meets both of the above listed needs and which is conducive to use with existing computer systems and/or display devices.
Accordingly, the present invention provides a system and method for power mode switching in a display device which consistently achieves less than 1 W power dissipation in standby mode. The present invention further provides a system and method for power mode switching in a display device which not only consistently achieves less than 1 W power dissipation in standby mode but which is also inexpensive to build. Moreover, embodiments of the present invention utilize components that are well known in the art and are compatible with existing computer systems and/or display devices, so that the present invention is conducive to use with existing computer systems and/or display devices. These and other advantages of the present invention not specifically mentioned above will become clear within discussions of the present invention presented herein.
More specifically, embodiments of the present invention include a system and method for reduced standby power consumption in a display device. In one embodiment, a circuit for power mode switching between a main mode and a standby mode of a display device is provided. In this embodiment, the circuit includes a power supply unit coupled to a power source for receiving an input power signal and for generating output power signals when the display device is in the main mode. The circuit also comprises an opto coupler coupled to a computer and responsive to a sync signal therefrom. By using the opto coupler to monitor a sync signal from the computer and to control the power supply via feedback signal, the present invention avoids incurring switching loss by the power supply unit and also avoids providing power to microprocessor during standby mode. The standby power consumption of the circuit is thus minimized, since the power supply and microprocessor need not stay on while the display device is in standby mode. The opto coupler is also coupled to the power supply unit for selectively sending an OFF signal thereto when the opto coupler does not detect the sync signal from the computer. In accordance with the present invention, sync signal can be an h-sync signal, a composite sync signal, or any of their equivalents. Moreover, in this embodiment, the power supply unit shuts down and stops generating the output power signals in response to the OFF signal, thereby switching the display device to the standby mode. Thus, in this embodiment, no switching loss is incurred by the power supply unit and the standby power consumption of the circuit is minimized. In a specific embodiment, the present invention includes the above and wherein the input power signal is substantially a 230 volts alternating current (AC) and the circuit consumes power at a rate of less than 1 watt while the display device is in the standby mode.
The invention offers a significant improvement in power conservation over the prior art circuits 100 and 200 as depicted in FIGS. 1 and 2 and as described above, which cannot consistently achieve a 1 watt or lower standby power consumption even though those prior art circuits 100 and 200 typically use more circuit components.
Embodiments of the present invention include the above and wherein the opto coupler is also for selectively sending an ON signal to the power supply unit when the opto coupler detects the sync signal from the computer while the display device is in the standby mode. Additionally, embodiments of the present invention include the above and wherein the power supply unit powers up and resumes generating the output power signals in response to the ON signal, thereby switching the display device to the main mode.